This part is a kind of semiconductor called 74HCT73.

Function of this product has Dual JK flip-flop with reset; negative-edge trigger.

Manufacturers : Philips

Image and pinout :

74HCT73 image and datasheet pinout



Some of the text within the PDF file :

74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev. 03 12 November 2004 Product data sheet 1. General description The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC73 is specified in compliance with JEDEC standard no. 7A. The 74HC is a dual negative-edge triggered JK flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. The reset (nR) is an asynchronous active LOW input. When LOW, it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highl [ ... ]


74HCT73 PDF Datasheet Download

2017/11/04 07:29 2017/11/04 07:29